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| implementation file: [http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32BranchTrans.cpp?view=markup http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32BranchTrans.cpp] | implementation file: [[http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32BranchTrans.cpp?view=markup|http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32BranchTrans.cpp]] |
'btr' LIR transformation replaces branch instructions with conditional CMOVcc or SETcc instructions
The algorithm takes one-pass over CFG.
The transformation allows to reduce count of branches and is recommended to be inserted before other LIR transformations
The algorithm works as follows:
1) Finds branch instruction which performs branch to basic blocks with
only instructions MOV with the same def-operand.
2) If each of thus blocks has only one predecessor they and branch
instruction is replaced with conditional instructionimplementation file: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32BranchTrans.cpp