'peephole' Performs various architecture specific per-Inst optimizations.
The transformation performs simple local (per-BB) or per-Inst optimizations
Some of them include:
1) Inlined F2I conversion 2) A better instructions selection: Change 32bit immediate values to 8bit in ALU instructions MOVSS/MOVSD replaced with MOVQ MOVSS/MOVSD xmm, [memconst=0.] => PXOR xmm, xmm
It's recommended to have 2 passes of peephole:
the first one before a register allocator - to inline the conversions and provide more opportunities for further optimization.
And the second one - after the register allocator to improve the instructions selection.