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The global register allocator [:
Jitirno_OPT/regalloc: regalloc] is responsible for method-level allocation of registers and does not guarantee that all of the constrains are satisfied.
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The global register allocator
[[Jitirno_OPT/regalloc| regalloc]] is responsible for method-level allocation of registers and does not guarantee that all of the constrains are satisfied.
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implementation file: [http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32SpillGen.cpp?view=markup http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32SpillGen.cpp] [[BR]] implementation file: [[http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32SpillGen.cpp?view=markup|http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32SpillGen.cpp]] <<BR>>

'spillgen' - a basic-block local register allocator and spill generator.

The global register allocator regalloc is responsible for method-level allocation of registers and does not guarantee that all of the constrains are satisfied.

This transformation checks constrains for every instruction and generates basic block local spills if an instruction requires specific registers to be used and the registers are not free.

implementation file: http://svn.apache.org/viewvc/harmony/enhanced/drlvm/trunk/vm/jitrino/src/codegenerator/ia32/Ia32SpillGen.cpp

Jitrino_OPT/spillgen (last edited 2009-09-20 21:55:20 by localhost)